# Concurrent MAC unit design using VHDL for deep learning networks on FPGA

> Research article (2018 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE), 2018) · cited 19× · AI/ML

**Wikidata**: [openalex:W2829683544](https://www.wikidata.org/wiki/openalex:W2829683544)  
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