# clock gating

> technique used in synchronous circuits for reducing dynamic power dissipation, by adding more logic to a circuit to prune the clock tree (disabling portions of the circuitry so that the flip-flops in them do not have to switch states)

**Wikidata**: [Q590170](https://www.wikidata.org/wiki/Q590170)  
**Wikipedia**: [English](https://en.wikipedia.org/wiki/Clock_gating)  
**Source**: https://4ort.xyz/entity/clock-gating


## References

1. Freebase Data Dumps. 2013
2. [OpenAlex](https://docs.openalex.org/download-snapshot/snapshot-data-format)