# Capability-based addressing
**Wikidata**: [Q5034464](https://www.wikidata.org/wiki/Q5034464)  
**Wikipedia**: [English](https://en.wikipedia.org/wiki/Capability-based_addressing)  
**Source**: https://4ort.xyz/entity/capability-based-addressing

## Summary
Capability-based addressing is a security mechanism in operating systems that uses protected capability tokens to manage resource access rights. It is a specific implementation within the broader capability-based security model, which enhances system security by restricting operations to only what is explicitly authorized.

## Key Facts
- Capability-based addressing is a subclass of **capability-based security**, a foundational model for secure computing system design.
- It is categorized as a **facet of operating systems**, indicating its role in OS-level security architecture.
- The entity has a **sitelink count of 3**, meaning it is explicitly documented in 3 structured knowledge sources.
- It is documented in **three Wikipedia languages**: English, Persian (fa), and Norwegian (no).
- Its **Microsoft Academic ID is 2779081528**, though this service is discontinued.
- It has a **Freebase ID of /m/027k7_k** for persistent knowledge linking.
- It relates to **Capability Hardware Enhanced RISC Instructions (CHERI)**, a hardware architecture implementing capability-based security.

## FAQs
### Q: What problem does capability-based addressing solve?  
A: It addresses security vulnerabilities in traditional address-based systems by replacing memory addresses with tamper-resistant capability tokens that grant explicit access rights, preventing unauthorized resource access and privilege escalation.

### Q: How does it differ from traditional memory addressing?  
A: Unlike physical/virtual addresses, which are location-based and vulnerable to spoofing, capability-based tokens encapsulate both a resource identifier and access permissions, requiring hardware verification for validity before granting access.

### Q: Where is capability-based addressing most relevant today?  
A: It is primarily implemented in high-security operating systems and experimental hardware like Capability Hardware Enhanced RISC Instructions (CHERI), where its fine-grained access control mitigates modern cyber threats.

### Q: What are its limitations?  
A: Adoption is limited by hardware compatibility requirements and complexity of retrofitting legacy systems, though security-critical domains like military computing increasingly utilize it.

## Why It Matters
Capability-based addressing fundamentally reshapes how operating systems enforce security by shifting from location-based access rights to token-based authorization. It directly addresses critical vulnerabilities like buffer overflows and memory corruption attacks inherent in address-based systems. By integrating hardware-level capability validation (e.g., via CHERI), it enables provably secure execution environments—essential for cloud computing, IoT, and multi-tenant systems. Though niche today, its principles drive innovation in hardware-assisted security, offering a scalable solution to escalating cyber threats where traditional models fail. Its influence on modern OS design underscores the shift toward capability-centric security paradigms.

## Notable For
- **Pioneer in hardware-enforced security**: Directly inspired architectures like CHERI, which implement capabilities in silicon for tamper-resistant access control.
- **Least-privilege enforcement**: Restrictive design ensures processes only access resources explicitly permitted via capabilities, minimizing attack surfaces.
- **Location-independent resource access**: Decouples security from memory addresses, enabling secure resource sharing across processes without shared memory risks.
- **Minimalist security model**: Relies on simple, immutable tokens rather than complex access-control lists, reducing implementation overhead and potential flaws.

## Body
### Overview
- Capability-based addressing is a security mechanism within operating systems that leverages **capability tokens** as protected objects granting access rights to resources.
- It is a specialized subclass of **capability-based security**, a foundational model for designing secure computing systems.

### Technical Implementation
- **Capabilities replace addresses**: Instead of referencing memory locations, systems use unforgeable tokens that bind a resource identifier to permitted operations (e.g., read/write/execute).
- **Hardware integration**: Relies on hardware validation (e.g., CHERI) to ensure tokens are valid before granting resource access, preventing software-level manipulation.
- **Tamper resistance**: Tokens are designed to be immutable, preventing unauthorized modification or privilege escalation via memory corruption exploits.

### Related Systems
- **Capability Hardware Enhanced RISC Instructions (CHERI)**: A CPU architecture extending RISC-V with capability registers, directly supporting capability-based addressing in hardware.
- **Capability-based security**: Broader model that includes capability-based addressing as a core component, focusing on least-privilege access control.

### Knowledge Representation
- **Structured data**: Identified with **Freebase ID /m/027k7_k** and **Microsoft Academic ID 2779081528**.
- **Multilingual documentation**: Covered in English, Persian (fa), and Norwegian (no) Wikipedia.
- **Knowledge sources**: Explicitly linked in 3 structured data sources (sitelink count: 3).