# BluSTL: Controller Synthesis from Signal Temporal Logic Specifications

> Research article (EPiC series in computing, 2018) · cited 26× · AI/ML

**Wikidata**: [openalex:W2575165025](https://www.wikidata.org/wiki/openalex:W2575165025)  
**Source**: https://4ort.xyz/entity/blustl-controller-synthesis-from-signal-temporal-logic-specifications