# An inter-layer interconnect BIST solution for monolithic 3D ICs

> Research article (2018 IEEE 36th VLSI Test Symposium (VTS), 2018) · cited 10× · AI/ML

**Wikidata**: [openalex:W2807174038](https://www.wikidata.org/wiki/openalex:W2807174038)  
**Source**: https://4ort.xyz/entity/an-inter-layer-interconnect-bist-solution-for-monolithic-3d-ics