# An Efficient Racetrack Memory-Based Processing-in-Memory Architecture for Convolutional Neural Networks

> Research article (2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC), 2017) · cited 17× · AI/ML

**Wikidata**: [openalex:W2805638497](https://www.wikidata.org/wiki/openalex:W2805638497)  
**Source**: https://4ort.xyz/entity/an-efficient-racetrack-memory-based-processing-in-memory-architecture-for-convolutional-neural-networks
