# An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With <inline-formula> <tex-math notation="LaTeX">$0.175~\mu$ </tex-math> </inline-formula>W/Channel in 65-nm CMOS

> Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018) · cited 50× · AI/ML

**Wikidata**: [openalex:W2900268635](https://www.wikidata.org/wiki/openalex:W2900268635)  
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