# A Spatial Multi-Bit Sub-1-V Time-Domain Matrix Multiplier Interface for Approximate Computing in 65-nm CMOS

> Research article (IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2018) · cited 14× · AI/ML

**Wikidata**: [openalex:W2844381982](https://www.wikidata.org/wiki/openalex:W2844381982)  
**Source**: https://4ort.xyz/entity/a-spatial-multi-bit-sub-1-v-time-domain-matrix-multiplier-interface-for-approximate-computing-in-65-nm-cmos