# A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-Based FPGAs

> Research article (IEEE Transactions on Computers, 2018) · cited 17× · AI/ML

**Wikidata**: [openalex:W2782573760](https://www.wikidata.org/wiki/openalex:W2782573760)  
**Source**: https://4ort.xyz/entity/a-scheme-to-design-concurrent-error-detection-techniques-for-the-fast-fourier-transform-implemented-in-sram-based-fpgas