# A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting

> Research article (IEEE Journal of Solid-State Circuits, 2023) · cited 14× · AI/ML

**Wikidata**: [openalex:W4386702690](https://www.wikidata.org/wiki/openalex:W4386702690)  
**Source**: https://4ort.xyz/entity/a-rail-to-rail-12-ms-s-91-3-db-sndr-94-1-db-dr-two-step-sar-adc-with-integrated-input-buffer-using-predictive-level-shif