# A Pipelined Parallel Hardware Architecture for 2-D Real-Time Electrical Capacitance Tomography Imaging Using Interframe Correlation

> Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017) · cited 26× · AI/ML

**Wikidata**: [openalex:W2571674088](https://www.wikidata.org/wiki/openalex:W2571674088)  
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