# A New FPGA-Based Segmented Delay-Line DPWM With Compensation for Critical Path Delays

> Research article (IEEE Transactions on Power Electronics, 2017) · cited 17× · AI/ML

**Wikidata**: [openalex:W2765621995](https://www.wikidata.org/wiki/openalex:W2765621995)  
**Source**: https://4ort.xyz/entity/a-new-fpga-based-segmented-delay-line-dpwm-with-compensation-for-critical-path-delays
