# A Linearity-Enhanced 10-Bit 160-MS/s SAR ADC With Low-Noise Comparator Technique

> Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019) · cited 10× · AI/ML

**Wikidata**: [openalex:W2945153161](https://www.wikidata.org/wiki/openalex:W2945153161)  
**Source**: https://4ort.xyz/entity/a-linearity-enhanced-10-bit-160-ms-s-sar-adc-with-low-noise-comparator-technique