# A Fractional-N Digitally Intensive PLL Achieving 428-fs Jitter and <−54-dBc Spurs Under 50-mVpp Supply Ripple

> Research article (IEEE Journal of Solid-State Circuits, 2021) · cited 23× · AI/ML

**Wikidata**: [openalex:W3212243158](https://www.wikidata.org/wiki/openalex:W3212243158)  
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