# A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors

> Research article (IEEE Transactions on Circuits and Systems I Regular Papers, 2019) · cited 148× · AI/ML

**Wikidata**: [openalex:W2966524683](https://www.wikidata.org/wiki/openalex:W2966524683)  
**Source**: https://4ort.xyz/entity/a-dual-split-6t-sram-based-computing-in-memory-unit-macro-with-fully-parallel-product-sum-operation-for-binarized-dnn-ed