# A CMOS Synchronized Sample-and-Hold Artifact Blanking Analog Front-End Local Field Potential Acquisition Unit With ±3.6-V Stimulation Artifact Tolerance and Monopolar Electrode-Tissue Impedance Measurement Circuit for Closed-Loop Deep Brain Stimulation SoCs

> Research article (IEEE Transactions on Circuits and Systems I Regular Papers, 2023) · cited 15× · AI/ML

**Wikidata**: [openalex:W4327808024](https://www.wikidata.org/wiki/openalex:W4327808024)  
**Source**: https://4ort.xyz/entity/a-cmos-synchronized-sample-and-hold-artifact-blanking-analog-front-end-local-field-potential-acquisition-unit-with-3-6-v
