# A 68.6fs<sub>rms</sub>-total-integrated-jitter and 1.56μs-locking-time fractional-N bang-bang PLL based on type-II gear shifting and adaptive frequency switching

> Research article (2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022) · cited 21× · AI/ML

**Wikidata**: [openalex:W4220957393](https://www.wikidata.org/wiki/openalex:W4220957393)  
**Source**: https://4ort.xyz/entity/a-68-6fs-sub-rms-sub-total-integrated-jitter-and-1-56s-locking-time-fractional-n-bang-bang-pll-based-on-type-ii-gear-shi
