# A 60-MS/s 5-MHz BW Noise-Shaping SAR ADC With Integrated Input Buffer Achieving 84.2-dB SNDR and 97.3-dB SFDR Using Dynamic Level-Shifting and ISI-Error Correction

> Research article (IEEE Journal of Solid-State Circuits, 2022) · cited 21× · AI/ML

**Wikidata**: [openalex:W4285293167](https://www.wikidata.org/wiki/openalex:W4285293167)  
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