# A 28.5–33.5GHz fractional-N PLL using a 3<sup>rd</sup> order noise shaping time-to-digital converter with 176fs resolution

> Research article (ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC), 2015) · cited 10× · AI/ML

**Wikidata**: [openalex:W2296663186](https://www.wikidata.org/wiki/openalex:W2296663186)  
**Source**: https://4ort.xyz/entity/a-28-5-amp-x2013-33-5ghz-fractional-n-pll-using-a-3-lt-sup-gt-rd-lt-sup-gt-order-noise-shaping-time-to-digital-converter