# A 24 GHz PLL with low phase noise for 60 GHz Sliding-IF transceiver in a 65-nm CMOS

> Research article (Microelectronics Journal, 2021) · cited 10× · AI/ML

**Wikidata**: [openalex:W3163317750](https://www.wikidata.org/wiki/openalex:W3163317750)  
**Source**: https://4ort.xyz/entity/a-24-ghz-pll-with-low-phase-noise-for-60-ghz-sliding-if-transceiver-in-a-65-nm-cmos