# A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory

> Research article (2015 Symposium on VLSI Circuits (VLSI Circuits), 2015) · cited 20× · AI/ML

**Wikidata**: [openalex:W1918935455](https://www.wikidata.org/wiki/openalex:W1918935455)  
**Source**: https://4ort.xyz/entity/a-23mw-face-recognition-accelerator-in-40nm-cmos-with-mostly-read-5t-memory
