# A 177 TOPS/W, Capacitor-based In-Memory Computing SRAM Macro with Stepwise-Charging/Discharging DACs and Sparsity-Optimized Bitcells for 4-Bit Deep Convolutional Neural Networks

> Research article (2022 IEEE Custom Integrated Circuits Conference (CICC), 2022) · cited 49× · AI/ML

**Wikidata**: [openalex:W4280533641](https://www.wikidata.org/wiki/openalex:W4280533641)  
**Source**: https://4ort.xyz/entity/a-177-tops-w-capacitor-based-in-memory-computing-sram-macro-with-stepwise-charging-discharging-dacs-and-sparsity-optimiz
