# A 0.6-V 44.6-fJ/Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm/°C Stability

> Research article (IEEE Solid-State Circuits Letters, 2019) · cited 10× · AI/ML

**Wikidata**: [openalex:W2980204243](https://www.wikidata.org/wiki/openalex:W2980204243)  
**Source**: https://4ort.xyz/entity/a-0-6-v-44-6-fj-cycle-energy-optimized-frequency-locked-loop-in-65-nm-cmos-with-20-3-ppm-c-stability