# A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines

> Research article (IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020) · cited 14× · AI/ML

**Wikidata**: [openalex:W3015626316](https://www.wikidata.org/wiki/openalex:W3015626316)  
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