# 8.6 A 2.5-to-5.75GHz 5mW 0.3ps<inf>rms</inf>-jitter cascaded ring-based digital injection-locked clock multiplier in 65nm CMOS

> Research article (2017 IEEE International Solid-State Circuits Conference (ISSCC), 2017) · cited 38× · AI/ML

**Wikidata**: [openalex:W2594705442](https://www.wikidata.org/wiki/openalex:W2594705442)  
**Source**: https://4ort.xyz/entity/8-6-a-2-5-to-5-75ghz-5mw-0-3ps-lt-inf-gt-rms-lt-inf-gt-jitter-cascaded-ring-based-digital-injection-locked-clock-multipl