# 7.5 A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm<sup>2</sup>and 6T HBST-TRAM-Based 2D Data-Reuse Architecture

> Research article (2019 IEEE International Solid- State Circuits Conference - (ISSCC), 2019) · cited 43× · AI/ML

**Wikidata**: [openalex:W2922086978](https://www.wikidata.org/wiki/openalex:W2922086978)  
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