# 4.5 A 9.25GHz Digital PLL with Fractional-Spur Cancellation Based on a Multi-DTC Topology

> Research article (2023 IEEE International Solid- State Circuits Conference (ISSCC), 2023) · cited 34× · AI/ML

**Wikidata**: [openalex:W4360605445](https://www.wikidata.org/wiki/openalex:W4360605445)  
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