# 3-D Stacked Synapse Array Based on Charge-Trap Flash Memory for Implementation of Deep Neural Networks

> Research article (IEEE Transactions on Electron Devices, 2018) · cited 49× · AI/ML

**Wikidata**: [openalex:W2901988317](https://www.wikidata.org/wiki/openalex:W2901988317)  
**Source**: https://4ort.xyz/entity/3-d-stacked-synapse-array-based-on-charge-trap-flash-memory-for-implementation-of-deep-neural-networks