# 17.3 A −58dBc-Worst-Fractional-Spur and −234dB-FoM<sub>jitter</sub>, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word

> Research article (2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020) · cited 43× · AI/ML

**Wikidata**: [openalex:W3016145810](https://www.wikidata.org/wiki/openalex:W3016145810)  
**Source**: https://4ort.xyz/entity/17-3-a-58dbc-worst-fractional-spur-and-234db-fom-sub-jitter-sub-5-5ghz-ring-dco-based-fractional-n-dpll-using-a-time-inv