# 15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

> Research article (2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020) · cited 179× · AI/ML

**Wikidata**: [openalex:W3016021860](https://www.wikidata.org/wiki/openalex:W3016021860)  
**Source**: https://4ort.xyz/entity/15-2-a-28nm-64kb-inference-training-two-way-transpose-multibit-6t-sram-compute-in-memory-macro-for-ai-edge-chips
