# 10.7 A 185fsrms-integrated-jitter and −245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector

> Research article (2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016) · cited 42× · AI/ML

**Wikidata**: [openalex:W2291102602](https://www.wikidata.org/wiki/openalex:W2291102602)  
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